UART stands for Universal Asynchronous Receiver Transmitter. It is a dedicated hardware for serial communication. If you can recall the legacy system configurations, you can see that devices like printer, modem, and mouse were linked using heavy connectors. All these devices made use of the UART for communication. This post will discuss Universal Asynchronous Receiver Transmitter (UART) Communication Protocol, its block diagram, frame structure, rules, advantages and disadvantages.
A Quick Refresh on Serial and Parallel Communication
Digital transfer of data can happen in either serial mode or parallel mode. According to the number of paths for communication, they are termed as Serial and Parallel Communication.
Serial communication takes place by using only a single wire or line. Hence, for a two-way communication, we will only need two wires between the transmitter and receiver.
Fig. 1 – Data Flow through Single Path in Serial Communication
It requires fewer wires and circuitry and lowers the cost of implementation. Hence, using serial communication is now preferred and considered more practical in complex circuitry.
In parallel mode of transfer, there is a onetime transfer of data from source to destination. This is made possible using multiple channels for data transfer between transmitter and receiver.
Fig. 2 – Parallel Communication – Data Flow through Parallel Paths
This mode of communication is expensive since it requires additional cables and hardware. Nevertheless, it is considered to be a swift mode of transfer. Devices like printers, RAM and PCI use this type of communication.
Block Diagram of Universal Asynchronous Receiver Transmitter (UART)
The Universal Asynchronous Receiver Transmitter (UART) block diagram has two main components. They are the receiver and transmitter. These two components are coupled with a baud rate generator. This is used mainly for speed generation when the receiver and transmitter section has to receive or transmit data.
The receiver section consists of shift register, control logic and a receive hold register. Likewise, transmitter section also has a shift register, control logic and a transmit hold register. The transmitter hold register contains the data to be transmitted. The shift registers in the two components move the data bits left or right till the data transmission or receive operation is completed.
A write or read logic is used to indicate when the read and write operation must be done. The baud rate generator is used to generate speeds ranging from 110 bps to 230400 bps. The micro-controllers typically use a baud rate of 9600 bps to 115200 bps.
Fig. 3 – Block Diagram of Universal Asynchronous Receiver Transmitter (UART)
Universal Asynchronous Receiver Transmitter (UART) Communication
Universal Asynchronous Receiver Transmitter communication takes place through two mediums i.e. transmitting UART and receiving UART. The data flow is from both receiving (Rx) and transmitting (Tx) pins of Universal Asynchronous Receiver Transmitter and only two cables are required for this purpose.
Universal Asynchronous Receiver Transmitter communication happens asynchronously i.e. clock or other timing signals are absent. Instead of that, UART has special start and stop bits that are added to the beginning and end of the data packet respectively. These bits assist the receiving UART in identifying the actual received data.
Fig. 4 – UART Communication Process
The above figure shows a typical Universal Asynchronous Receiver Transmitter (UART) communication process. The controlling device transfers data to the transmitting UART through a data bus. This controlling device can be a CPU of a micro-controller or microprocessor, memory units like ROM or RAM. The transmitting UART receives data through parallel mode of communication.
The data is converted into a data packet by adding the start, stop and parity bits by the Universal Asynchronous Receiver Transmitter (UART). It is then converted from parallel to serial form using a shift register and is transmitted bit wise from the Tx pin.
This serial data is received by the Rx pin and identifies the actual data through the start and stop bits. Data integrity is verified using the parity bit. The data is again converted into parallel mode using shift register and is dispatched to the controller at the receiving end.
Structure of Data Packet or Frame of UART
The Data Packet in Universal Asynchronous Receiver Transmitter (UART) communication is a combination of four basic components. They are:
- Start Bit
- Parity Bit
- Stop Bit
The standard data framing in Universal Asynchronous Receiver Transmitter (UART) is as shown below.
Fig. 5 – Universal Asynchronous Receiver Transmitter (UART) Data Frame
Let us now consider each part of the frame.
This is also called as Synchronization Bit and is placed prior to actual data. Quite often, a high voltage, dormant data transmission line is maintained before data transmission can begin.
Universal Asynchronous Receiver Transmitter (UART) drags this inactive line from a high level of voltage (1) to low voltage (0) so as to begin transmission. The receiving data line recognizes this change in voltage level and begins to understand the actual data. Generally, a single bit is allocated as start bit.
Data starts after Start Bit. It is the actual information packet intended to be sent through transmission line.
It is placed at the packet’s end. This is generally two bits in length but often only one bit is used. The data line is kept on high voltage by UART in order to end the broadcast.
The legitimacy of the received data can be ensured using the parity bit. It is a small-scale system for fault checking and is available in two different ranges. They are called as odd and even parity respectively. Parity bit is made optional and is not used widely.
Rules of Universal Asynchronous Receiver Transmitter (UART)
It is necessary for the transmitter and receiver to agree upon a certain set of rules for error free data transfer. This is due to the absence of a clock signal in Universal Asynchronous Receiver Transmitter (UART) communication process. Some of the rules are as mentioned below:
- Synchronization bits (Start/ Stop Bit)
- Parity bits
- Data bits
- Baud rate
Synchronization Bits, Parity Bits and Data Bits have already been discussed in Structure of Universal Asynchronous Receiver Transmitter (UART). Another important aspect other than these is Baud Rate. Baud rate is the speed at which data transmission takes place and is measured in bits per second. Some standard baud rates include 9600 bps, 4800 bps, 115200 bps and others.
Advantages of Universal Asynchronous Receiver Transmitter (UART)
Below are some of the advantages offered by Universal Asynchronous Receiver Transmitter (UART):
- Full duplex transmission of data can be achieved with only two wires.
- Clock or timing signals are not required.
- Integrated error checking is ensured using parity bits.
Disadvantages of Universal Asynchronous Receiver Transmitter (UART)
The disadvantages of using Universal Asynchronous Receiver Transmitter (UART) are as follows:
- The data frame is limited by size.
- Data transfer speed is low in comparison with parallel communication.
- Appropriate rules must be agreed upon by both parties in communication.
- It doesn’t support several slave or master systems.